lists@rtty.us said:

But "user programmable" won't find all the nasty ones.

I haven't been looking recently.  There used to be some that were field
programable.  The idea was that the distributor would do it so you didn't
have to wait for the factory to grind the crystal to order if you wanted an
oddball frequency.  They didn't mention the PLL in the data sheet.  You had
to read between the lines.

I assume the distributor stocked a handful of basic frequencies and there was
a PC that told them which one to use and did the programming if you told it
what frequency you wanted.

It looks like a fun math problem.  How many frequencies do you need to stock
in order to cover a given frequency range with a given PLL chip?  The result
doesn't have to be a direct hit.  You can include some fudge as part of the
overall accuracy spec.  (If you claim 100 PPM, but cut the crystal within 50
PPM, then you have 50 PPM left for the PLL.)

--
These are my opinions.  I hate spam.

I am familiar with the Epson Seiko SG8002 series and nowhere does it say they are programmable. They are not user programmable for sure, only the distributor has the tools to do it. The data sheet does not have any information that would be a hint that they are PLL's.

Http://WWW.KO4BB.com/Timing/MicroprocessorCrystals.php

Didier

Hal Murray hmurray@megapathdsl.net wrote:

--
Sent from my Motorola Droid Razr 4G LTE wireless tracker while I do other things.

SG8002 is definitely a distributor programmable unit.

It is a digital synthesizer in a can with no effort towards clean output.

PLL? They would not bother to put a cleanup PLL in the can for the
intended microprocessor application.

Tim N3QE

On 7/21/13, Didier Juges shalimr9@gmail.com wrote:

There is no "cleanup" PLL in the SG8002, the output spectrum looks like that of a cheap PLL-on-a-chip. I did not see any evidence of wide band spurs but the phase noise is terrible, as you would get when the VCO and it's tank components are on-chip, which is the only way they could achieve the price point.

My experience also shows that high level of radiated noise around the device (as when used inside a high power switching supply) causes it to malfunction, as if it was losing lock. In our applications, they have to be shielded.

Didier

Tim Shoppa tshoppa@gmail.com wrote:

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Sent from my Motorola Droid Razr 4G LTE wireless tracker while I do other things.

On 22/07/13 04:42, Didier Juges wrote:

Oh, those. I remember those. About 10 years ago we had a lot of issues
with these programable clocks. By measuring the 1 cycle jitter profile
(use what you got, had a good sampling scope) I could fairly quickly see
if it was up to no good or a possible candidate. You could clearly see
the separation into two lines for the clock and that gave us a hint,
which correlated well with BER estimates on the high-speed links.

If you look around, you will find several companies patenting their
field programmable device, and it's infrastructure more on the concept
level than the actual technology in the crystal. It's a nice complement
for many odd frequencies, but when you want a clean signal it doesn't
help. We had the distributors saying things like "you can't see that!"
and we replied "Sure we can, look!". It was at that time that
oscillator-selection no longer was a datasheet and price issue for us,
but testing became a routine issue for the critical stuff. It was a good
learning experience for a then young company and yours truly.

Cheers,
Magnus

David,

The 10811 linearity may not be that good rail to rail, but how linear is yours over the narrow EFC range you use during a stability measurement? I would expect it to be very good over any given interval of a few or tens of mV.

/tvb

----- Original Message -----
From: "David Hooke" dhooke@gmail.com
To: "Discussion of precise time and frequency measurement" public-time-nuts-JSkTLETqlTM@plane.gmane.org
Sent: Monday, July 22, 2013 5:23 AM
Subject: [time-nuts] TPLL linearity and other questions

David asked:

Of course you could try and do some form of post data processing (before
filtering), but the KISS answer for a high end TPLL tester is to just limit
its lock range.
I set up my TPLL circuit so that it can Phase lock only over ~ +- 2e-8 freq
range and limit the analyzing range to around +- 1e-9

To calibrate, I use a 10 MHz source that can be offset by small known fixed
freq amounts.
First I zero the TPLL's DC output with exactly 10 MHz applied, then apply an
offset of +- 1e-11,  +-1e-10, +-1e-9 and finally +-2e-9.
A Tbolt and LadyHeather makes a great offset reference generator for this.
It is done by changing the Dac voltage while in holdover, using LH's
filtered phase and freq plots to verify the amount of freq offset.

To further check both DC and dynamic performance of the TPLL,
I use a stable OXCO with known EFC gain at 10MHz and apply a small know
attenuated signal into it's EFC at various waveforms, amplitudes, and
frequencies.
Only need a simple audio function generator and a TBolt to calibrate and
verify that the TPLL is working correctly.

TPLL advanced note:
Have to be careful of anything that will roll off the response of the
controlled or test oscillator's EFC input.
Just the capacitance of the EFC's shielded cable of a dual oven 10811 is
more than enough to screw things up if you are not careful.

ws

From: "Tom Van Baak" David,

From: "David Hooke"
Subject: [time-nuts] TPLL linearity and other questions