Discussion and technical support related to USRP, UHD, RFNoC
View all threadsHell usrp users,
I didn't find some datasheet describing the RF specifications of the LFRX daughterboard.
Can you tell me what is the sensitivity of the LFRX board ? We can define the sensitivity
in the following way:
This is the power of a 3kHz bandwidth signal injected in the input which gives a 10 dB
signal to noise ratio
(noise is the noise level of the sampler).
Thanks,
matis
Hi Matis,
the LFRX is really just a dual-opamp in a band-limited voltage-follower
configuration [1]. The Opamp's datasheet can be found at [2].
Which frequencies are we referring to? The gain of this active filter
depends on the center frequency, and so does the noise of the ADC and of
the opamp, though to a lesser extent.
Now, the SNR after sampling depends on the motherboard you're using the
LFRX with (USRP1,2,B100,N200/210,E100/110 or X300/310); it's also worth
noting that all the USRPs sample at a sampling rate much higher than
your signal's bandwidth, and do decimate according to your needs inside
the FPGA – so that you get the oversampling "processing SNR gain" for free.
So, let's do a rough estimate:
The AD8132 datasheet says on p.6 Input Voltage Noise is
$8,\frac{\si{\nano\volt}}{\sqrt{\si{\hertz}}}$ , so let's square that,
$\SI{64e-18}{\square\volt\per\hertz}$, which over the nominal
$\SI{50}{\ohm}$ is (according to P=UI and Ohm's law) means a noise power
of $N=\SI{3.2e-15}{\watt\per\hertz}\approx\SI{-115}{\dBm\per\hertz}$; so
in $\SI{3}{\kilo\hertz}\approx\SI{34.7}{\dB\hertz}$, your signal would
need to have $(-115+34.7+10)\si{\dBm} = \SI{-70.5}{\dBm}$ power.
Note that this really isn't the end of the story – for example, assuming
you're using a N210, the ADC runs with a constant 100 MS/s, oversampling
your 3kHz signal more than thirtythousandfold. So there's a lot of
processing gain to be had. However, the ADC is a 14bit ADC with an
effective number of bits of ca. 12 – at full sampling rate. So,
technically, the minimum differential voltage reliably detectable is
$U_\text{full scale}\cdot 2^{-12}$. On the N210, the full-scale voltage
is 1Vpp, leading to a minimum detectable voltage of 244 µV, or a power
of $\SI{1.19}{\nano\watt}\approx\SI{-59.2}{\dBm}$ over $\SI{50}{\ohm}$,
which seems to be worse than what's technically possible. Now, dithering
to the rescue; by adding uncorrelated noise to the signal and using the
oversampling you have, anyway, a signal smaller than the minimum
quantization step can be visible; but the possibility of that depends on
your signal's correlation properties and how much noise you willingly or
inherently add, as well as that noise's amplitude PDF and autocorrelation.
Hope that gives you a start on things,
best regards,
Marcus
[1] https://files.ettus.com/schematics/lfrx/lfrx.pdf
[2]
http://www.analog.com/media/en/technical-documentation/data-sheets/AD8132.pdf
On 14.10.2016 09:41, Matis Alun via USRP-users wrote:
Hell usrp users,
I didn't find some datasheet describing the RF specifications of the LFRX daughterboard.
Can you tell me what is the sensitivity of the LFRX board ? We can define the sensitivity
in the following way:
This is the power of a 3kHz bandwidth signal injected in the input which gives a 10 dB
signal to noise ratio
(noise is the noise level of the sampler).
Thanks,
matis
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