and Jim, a footnote-
the ultimate clock is used as a sample rate clock for ADC, DAC, FPGA .
this drives everything. I can tweak say frequency offset of the system
channels that I generate with internal FPGA DDS, but producing a Part
PerBillion accurate sample rate conversion running at 393 MHz sample
rate would be a whole world of pain,
hope that clarifies why... best . glen.
On 13/12/2023 6:02 am, Jim Lux via time-nuts wrote:
I can't remember where this thread started, but do you actually need to move the oscillator at all? Or is "knowledge" good enough?
For instance, could you have a (
and Jim, a footnote-
the ultimate clock is used as a sample rate clock for ADC, DAC, FPGA .
this drives everything. I can tweak say frequency offset of the system
channels that I generate with internal FPGA DDS, but producing a Part
PerBillion accurate sample rate conversion running at 393 MHz sample
rate would be a whole world of pain,
hope that clarifies why... best . glen.
On 13/12/2023 6:02 am, Jim Lux via time-nuts wrote:
>
>
>
>
> I can't remember where this thread started, but do you actually need to move the oscillator at all? Or is "knowledge" good enough?
> For instance, could you have a (
>
