Hello All, I’m spinning my wheels on this and could use a clear cut answer. I have GNU Radio 3.10.9.2 and get the following when i do “uhd_find_devices” command “linux; GNU C++ version 13.3.0; Boost_108300; UHD_4.8.0.0-266-g50967d13” I finally got an FPGA to build with the axi_ram_fifo.yml (i customized it for my **E310**). All the SEP connections look good. When I went to GNU Radio I could not find DMA FIFO **or any** FIFO block. I seem to have a lot of the other RFNoC blocks (not sure if any others are missing, but I have the vast majority at least). **QUESTION:** How do I enable or get the block to show in GNU Radio 3.10? I’ve tried using rfnocmodtool, but I’m not sure what I’m doing and a lot of OOT RFNoC documents are outdated. I need this DMA FIFO to stream my vector source into my RFNoC DUC and then to my RFNoC Radio. Without it my vector source to DUC caps out at around 5MS/s which is not enough for my purposes. I need to get closer to the 10 MS/s limit (between arm and fpga). Additional question: If anyone has a better idea of how to transmit a square wave pulse that is only 400ns wide I’m all ears. Any help is greatly appreciated. Thank you in advance.

Hi, you're right, those bindings are missing. However, I don't believe you will be able to increase the throughput to 10 Msps on the E310. The interface is simply not very fast. Since you're able to build bitfiles, I would suggest trying to build a bitfile with a DRAM (capture/replay) block. You could upload your square wave (or any other wave) and play it in a loop. Then you can stream at any bandwidth up to the E310's max of 61.44Msps. Remove all other blocks from the design (only keep radio and DRAM). Hope this helps, --M On Mon, May 5, 2025 at 6:19 PM <kurz.reido@gmail.com> wrote: > Hello All, > > I’m spinning my wheels on this and could use a clear cut answer. > > I have GNU Radio 3.10.9.2 and get the following when i do > “uhd_find_devices” command “linux; GNU C++ version 13.3.0; Boost_108300; > UHD_4.8.0.0-266-g50967d13” > > I finally got an FPGA to build with the axi_ram_fifo.yml (i customized it > for my *E310*). All the SEP connections look good. > > When I went to GNU Radio I could not find DMA FIFO *or any* FIFO block. I > seem to have a lot of the other RFNoC blocks (not sure if any others are > missing, but I have the vast majority at least). > > *QUESTION:* How do I enable or get the block to show in GNU Radio 3.10? > I’ve tried using rfnocmodtool, but I’m not sure what I’m doing and a lot of > OOT RFNoC documents are outdated. > > I need this DMA FIFO to stream my vector source into my RFNoC DUC and then > to my RFNoC Radio. Without it my vector source to DUC caps out at around > 5MS/s which is not enough for my purposes. I need to get closer to the 10 > MS/s limit (between arm and fpga). > > > Additional question: If anyone has a better idea of how to transmit a > square wave pulse that is only 400ns wide I’m all ears. > > Any help is greatly appreciated. Thank you in advance. > > > _______________________________________________ > USRP-users mailing list -- usrp-users@lists.ettus.com > To unsubscribe send an email to usrp-users-leave@lists.ettus.com >

M, Thank you very much for your insightful reply. I will proceed with your suggested approach. Best Regards, \-Kurz