It was the April 1989 HP journal that made me post the question. The article makes really good reading about the core of the 3458. It also made me think about how one could implement the AD with the components available today and bench instruments. It should not take that many parts to make a single voltage range, moderate speed, single shot AD using a bench clock / counter / timer. Just for the learning. But about the switches there is not much in that article, just the paragraph quoted by TH, "A custom chip design.." etc. The article is otherwise seems like a very good starting point for learning multislope ADs. It seems like it would almost be possible to set up a spreadsheet with the data given. I noted that they use a 390pF integration cap which made me wonder what kind of switches where used, as any FET capacitance / charge would have to be compensated / cancelled / nulled somehow.

In message <CAFoWNwDa3sDE3RgQgqh350P9X-=td1H9dn342GXD_wDDTtvZww@mail.gmail.com> , Jan Fredriksson writes: >I noted that they use a 390pF integration cap which made me wonder what >kind of switches where used, as any FET capacitance / charge would have to >be compensated / cancelled / nulled somehow. It's described how they cancel it, by always doing a switch both "up" and "down" but of different lengths to get the desired result. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.

On 14/04/2014 18:46, Jan Fredriksson wrote: > It was the April 1989 HP journal that made me post the question. The > article makes really good reading about the core of the 3458. It also made > me think about how one could implement the AD with the components available > today and bench instruments. It should not take that many parts to make a > single voltage range, moderate speed, single shot AD using a bench clock / > counter / timer. Just for the learning. > > But about the switches there is not much in that article, just the > paragraph quoted by TH, "A custom chip design.." etc. > > The article is otherwise seems like a very good starting point for learning > multislope ADs. It seems like it would almost be possible to set up a > spreadsheet with the data given. > > I noted that they use a 390pF integration cap which made me wonder what > kind of switches where used, as any FET capacitance / charge would have to > be compensated / cancelled / nulled somehow. I suggest you take a look at this patent from 1993 where HP describe improvements to the ADC switches (I don't know if they ever used it an a saleable product): https://www.google.com/patents/US5321403 "The errors are significantly worse when standard components such as off-the-shelf analog switches are used for the input switching circuits. Prior art investigators have attempted to overcome these problems by implementing the input switching circuits in application-specific integrated circuit form and tightly controlling the manufacturing process, leading to very expensive solutions." Their solution is a different arrangement of switches (see patent for diagram): "The switches which control selection of the positive and negative reference currents are implemented in such a way that current surges are minimized. That is, each switch is a series-parallel pair of switches in which the series switch of the pair provides a path to the integrator summing node while the parallel switch of the pair provides a path to ground, and one of the switches in the switch pair is closed while the other of the pair is closed. State machine diagrams are used to express the algorithms used by the controller in operating the switches throughout the integrate and de-integrate cycles. The order and sequence in which the switches are operated eliminates the effects of charge injection due to operation of the switches as well as signals that are cross-coupled from the control lines of adjacent switches." Tony H