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Re: RCB-F9T Adapter PCB with USB and 50 Ohm Timepulse SMA Connectors

JS
John Sloan
Mon, Aug 22, 2022 7:59 PM

Sparkfun's ZED-F9T breakout board interfaces look like a step up from
u-blox' RCB-F9T. However, my reason to use the RCB-F9T is simple: I've
had a bunch of these for years and don't want to throw them away. Also,
I need to feed the timepulse signals into a 50 Ohm load and the ZED-F9T
output pins are only rated for max. 5 mA [1]. Except for a 33 Ohm
resistor, the Sparkfun board routes both timepulse pins directly to the
SMA connectors [2]. I doubt that results in 50 Ohm source impedance
required to properly drive a high impedance load via a 50 Ohm
transmission line.

Have you had any issues with unmatched transmission line effects?

Being an embedded software engineer in the telecom field, I’m probably not qualified to answer that question. But I did cause the board to reset when I tried putting 50 Ohm terminators on the TP1 and TP2 SMA connectors. When I did this I checked the SparkFun schematic and dimly recall that there is a resistor between each TP output pin and the corresponding output pin (if you choose to solder on a header) on the board, and that this connection is in parallel with the SMA connector, which has no resistor at all. So I am inclined to agree with you (despite my ignorance).

--
J. L. Sloan            Digital Aggregates Corporation
+1.303.489.5178        3440 Youngfield Street
mailto:jsloan@diag.com  #209
http://www.diag.com    Wheat Ridge CO 80033 USA

> Sparkfun's ZED-F9T breakout board interfaces look like a step up from > u-blox' RCB-F9T. However, my reason to use the RCB-F9T is simple: I've > had a bunch of these for years and don't want to throw them away. Also, > I need to feed the timepulse signals into a 50 Ohm load and the ZED-F9T > output pins are only rated for max. 5 mA [1]. Except for a 33 Ohm > resistor, the Sparkfun board routes both timepulse pins directly to the > SMA connectors [2]. I doubt that results in 50 Ohm source impedance > required to properly drive a high impedance load via a 50 Ohm > transmission line. > > Have you had any issues with unmatched transmission line effects? Being an embedded software engineer in the telecom field, I’m probably not qualified to answer that question. But I did cause the board to reset when I tried putting 50 Ohm terminators on the TP1 and TP2 SMA connectors. When I did this I checked the SparkFun schematic and dimly recall that there is a resistor between each TP output pin and the corresponding output pin (if you choose to solder on a header) on the board, and that this connection is in parallel with the SMA connector, which has no resistor at all. So I am inclined to agree with you (despite my ignorance). -- J. L. Sloan Digital Aggregates Corporation +1.303.489.5178 3440 Youngfield Street mailto:jsloan@diag.com #209 http://www.diag.com Wheat Ridge CO 80033 USA
JA
John Ackermann N8UR
Mon, Aug 22, 2022 10:50 PM

On 8/22/22 15:59, John Sloan via time-nuts wrote:

Have you had any issues with unmatched transmission line effects?

Being an embedded software engineer in the telecom field, I’m probably not qualified to answer that question. But I did cause the board to reset when I tried putting 50 Ohm terminators on the TP1 and TP2 SMA connectors. When I did this I checked the SparkFun schematic and dimly recall that there is a resistor between each TP output pin and the corresponding output pin (if you choose to solder on a header) on the board, and that this connection is in parallel with the SMA connector, which has no resistor at all. So I am inclined to agree with you (despite my ignorance).

I have had issues with various NEO-M8 and ZED-F9 boards when running the
TP at a high (RF) rate, and driving more than a foot or two of coax into
a digital, presumably high impedance, input.

I think there are two related problems:

50 ohm coax driving a high impedance load is going to ring all over the
place if given a chance.  I found that putting an in-line 50 ohm
terminator at the far end cleaned the waveform up very nicely.  That's
not unique to u-blox, it's just a fact of life.

But with a terminator, the amplitude becomes marginal to trigger the
logic at the far end.  I suspect that's the u-blox not able to source
enough current to get a solid logic transition through the terminator,
and buffers should help.

There are newer and maybe better solutions, but on TAPR PPS projects
we've stuck with a design that Tom Clark came up with, paralleling
several (usually 3) 74AC04 inverters each with a 22 ohm resistor on its
output.  [ Originally Tom used 47 ohms thinking that would be better for
50 ohm coax, but all the higher resistance does is lower the voltage
available. 22 ohms works well and gives more oomph at the output. ]

The resistors may not do any one thing perfectly, but they provide
something resembling a source termination as well as equalize current if
the gates don't all trip at exactly the same time.  Whatever the theory,
it seems to provide a fairly robust output that can drive coax and
deliver a useful output at the far end.  As far as I've ever been able
to measure, the 74AC delay/jitter doesn't have any noticeable detriment
to the real world rise time.

As Bob said, this topic has been discussed a lot over the years and it's
really tough to reach an optimum solution because there are so many
different use cases.  The parallel AC04 gates have worked well for us.

Note that a potential issue with modern hardware is 3.3V GPS systems
trying to drive 5V logic inputs.  That doesn't give you a whole lot of
margin for termination loss.  Fortunately, everything I need to plug in
to these days seems to be happy with 3.3V levels.

John

On 8/22/22 15:59, John Sloan via time-nuts wrote: >> Have you had any issues with unmatched transmission line effects? > > Being an embedded software engineer in the telecom field, I’m probably not qualified to answer that question. But I did cause the board to reset when I tried putting 50 Ohm terminators on the TP1 and TP2 SMA connectors. When I did this I checked the SparkFun schematic and dimly recall that there is a resistor between each TP output pin and the corresponding output pin (if you choose to solder on a header) on the board, and that this connection is in parallel with the SMA connector, which has no resistor at all. So I am inclined to agree with you (despite my ignorance). I have had issues with various NEO-M8 and ZED-F9 boards when running the TP at a high (RF) rate, and driving more than a foot or two of coax into a digital, presumably high impedance, input. I think there are two related problems: 50 ohm coax driving a high impedance load is going to ring all over the place if given a chance. I found that putting an in-line 50 ohm terminator at the far end cleaned the waveform up very nicely. That's not unique to u-blox, it's just a fact of life. But with a terminator, the amplitude becomes marginal to trigger the logic at the far end. I suspect that's the u-blox not able to source enough current to get a solid logic transition through the terminator, and buffers should help. There are newer and maybe better solutions, but on TAPR PPS projects we've stuck with a design that Tom Clark came up with, paralleling several (usually 3) 74AC04 inverters each with a 22 ohm resistor on its output. [ Originally Tom used 47 ohms thinking that would be better for 50 ohm coax, but all the higher resistance does is lower the voltage available. 22 ohms works well and gives more oomph at the output. ] The resistors may not do any one thing perfectly, but they provide something resembling a source termination as well as equalize current if the gates don't all trip at exactly the same time. Whatever the theory, it seems to provide a fairly robust output that can drive coax and deliver a useful output at the far end. As far as I've ever been able to measure, the 74AC delay/jitter doesn't have any noticeable detriment to the real world rise time. As Bob said, this topic has been discussed a lot over the years and it's really tough to reach an optimum solution because there are so many different use cases. The parallel AC04 gates have worked well for us. Note that a potential issue with modern hardware is 3.3V GPS systems trying to drive 5V logic inputs. That doesn't give you a whole lot of margin for termination loss. Fortunately, everything I need to plug in to these days seems to be happy with 3.3V levels. John ----
CA
Carsten Andrich
Tue, Aug 23, 2022 7:37 PM

Hi John, John,

On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote:

On 8/22/22 15:59, John Sloan via time-nuts wrote:

Have you had any issues with unmatched transmission line effects?

Being an embedded software engineer in the telecom field, I’m
probably not qualified to answer that question. But I did cause the
board to reset when I tried putting 50 Ohm terminators on the TP1 and
TP2 SMA connectors. When I did this I checked the SparkFun schematic
and dimly recall that there is a resistor between each TP output pin
and the corresponding output pin (if you choose to solder on a
header) on the board, and that this connection is in parallel with
the SMA connector, which has no resistor at all. So I am inclined to
agree with you (despite my ignorance).

I have had issues with various NEO-M8 and ZED-F9 boards when running
the TP at a high (RF) rate, and driving more than a foot or two of
coax into a digital, presumably high impedance, input.

I think there are two related problems:

50 ohm coax driving a high impedance load is going to ring all over
the place if given a chance.  I found that putting an in-line 50 ohm
terminator at the far end cleaned the waveform up very nicely.  That's
not unique to u-blox, it's just a fact of life.

But with a terminator, the amplitude becomes marginal to trigger the
logic at the far end.  I suspect that's the u-blox not able to source
enough current to get a solid logic transition through the terminator,
and buffers should help.

Yep. Its digital outputs are rated for 5 mA max.

There are newer and maybe better solutions, but on TAPR PPS projects
we've stuck with a design that Tom Clark came up with, paralleling
several (usually 3) 74AC04 inverters each with a 22 ohm resistor on
its output.  [ Originally Tom used 47 ohms thinking that would be
better for 50 ohm coax, but all the higher resistance does is lower
the voltage available. 22 ohms works well and gives more oomph at the
output. ]

The resistors may not do any one thing perfectly, but they provide
something resembling a source termination as well as equalize current
if the gates don't all trip at exactly the same time. Whatever the
theory, it seems to provide a fairly robust output that can drive coax
and deliver a useful output at the far end. As far as I've ever been
able to measure, the 74AC delay/jitter doesn't have any noticeable
detriment to the real world rise time.

As Bob said, this topic has been discussed a lot over the years and
it's really tough to reach an optimum solution because there are so
many different use cases.  The parallel AC04 gates have worked well
for us.

Thanks for the suggestion. My general use case requires very low noise
and high slew-rates. The line drivers shouldn't substantially
deteriorate the performance of an LTC6957 (320 ps typ. output rise
time). I've narrowed usable parts down to AD8000, TI BUF602, and TI
BUF608. For now I've picked the BUF602, because it's hand solderable.

Note that a potential issue with modern hardware is 3.3V GPS systems
trying to drive 5V logic inputs.  That doesn't give you a whole lot of
margin for termination loss.  Fortunately, everything I need to plug
in to these days seems to be happy with 3.3V levels.

I've made the same observation. The RF ICs that I need to deliver 10/100
MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V.

John


time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe send an email to time-nuts-leave@lists.febo.com

Best regards,
Carsten

Hi John, John, On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote: > > On 8/22/22 15:59, John Sloan via time-nuts wrote: > >>> Have you had any issues with unmatched transmission line effects? >> >> Being an embedded software engineer in the telecom field, I’m >> probably not qualified to answer that question. But I did cause the >> board to reset when I tried putting 50 Ohm terminators on the TP1 and >> TP2 SMA connectors. When I did this I checked the SparkFun schematic >> and dimly recall that there is a resistor between each TP output pin >> and the corresponding output pin (if you choose to solder on a >> header) on the board, and that this connection is in parallel with >> the SMA connector, which has no resistor at all. So I am inclined to >> agree with you (despite my ignorance). > > I have had issues with various NEO-M8 and ZED-F9 boards when running > the TP at a high (RF) rate, and driving more than a foot or two of > coax into a digital, presumably high impedance, input. > > I think there are two related problems: > > 50 ohm coax driving a high impedance load is going to ring all over > the place if given a chance.  I found that putting an in-line 50 ohm > terminator at the far end cleaned the waveform up very nicely.  That's > not unique to u-blox, it's just a fact of life. > > But with a terminator, the amplitude becomes marginal to trigger the > logic at the far end.  I suspect that's the u-blox not able to source > enough current to get a solid logic transition through the terminator, > and buffers should help. Yep. Its digital outputs are rated for 5 mA max. > > There are newer and maybe better solutions, but on TAPR PPS projects > we've stuck with a design that Tom Clark came up with, paralleling > several (usually 3) 74AC04 inverters each with a 22 ohm resistor on > its output.  [ Originally Tom used 47 ohms thinking that would be > better for 50 ohm coax, but all the higher resistance does is lower > the voltage available. 22 ohms works well and gives more oomph at the > output. ] > > The resistors may not do any one thing perfectly, but they provide > something resembling a source termination as well as equalize current > if the gates don't all trip at exactly the same time. Whatever the > theory, it seems to provide a fairly robust output that can drive coax > and deliver a useful output at the far end. As far as I've ever been > able to measure, the 74AC delay/jitter doesn't have any noticeable > detriment to the real world rise time. > > As Bob said, this topic has been discussed a lot over the years and > it's really tough to reach an optimum solution because there are so > many different use cases.  The parallel AC04 gates have worked well > for us. Thanks for the suggestion. My general use case requires very low noise and high slew-rates. The line drivers shouldn't substantially deteriorate the performance of an LTC6957 (320 ps typ. output rise time). I've narrowed usable parts down to AD8000, TI BUF602, and TI BUF608. For now I've picked the BUF602, because it's hand solderable. > > Note that a potential issue with modern hardware is 3.3V GPS systems > trying to drive 5V logic inputs.  That doesn't give you a whole lot of > margin for termination loss.  Fortunately, everything I need to plug > in to these days seems to be happy with 3.3V levels. I've made the same observation. The RF ICs that I need to deliver 10/100 MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V. > > John > ---- > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe send an email to time-nuts-leave@lists.febo.com Best regards, Carsten
MW
Matthias Welwarsky
Wed, Aug 24, 2022 6:14 AM

Hi Carsten,

on my LEA-M8T breakout board I'm using two NC7SZ125 TinyLogic buffers in
parallel. I think it should be good for around 1ns of rise time and with two
82 Ohm series resistors it's close enough to 50 Ohms output impedance.

Schematics attached.

BR,
Matthias

On Dienstag, 23. August 2022 21:37:02 CEST Carsten Andrich via time-nuts
wrote:

Hi John, John,

On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote:

On 8/22/22 15:59, John Sloan via time-nuts wrote:

Have you had any issues with unmatched transmission line effects?

Being an embedded software engineer in the telecom field, I’m
probably not qualified to answer that question. But I did cause the
board to reset when I tried putting 50 Ohm terminators on the TP1 and
TP2 SMA connectors. When I did this I checked the SparkFun schematic
and dimly recall that there is a resistor between each TP output pin
and the corresponding output pin (if you choose to solder on a
header) on the board, and that this connection is in parallel with
the SMA connector, which has no resistor at all. So I am inclined to
agree with you (despite my ignorance).

I have had issues with various NEO-M8 and ZED-F9 boards when running
the TP at a high (RF) rate, and driving more than a foot or two of
coax into a digital, presumably high impedance, input.

I think there are two related problems:

50 ohm coax driving a high impedance load is going to ring all over
the place if given a chance.  I found that putting an in-line 50 ohm
terminator at the far end cleaned the waveform up very nicely.  That's
not unique to u-blox, it's just a fact of life.

But with a terminator, the amplitude becomes marginal to trigger the
logic at the far end.  I suspect that's the u-blox not able to source
enough current to get a solid logic transition through the terminator,
and buffers should help.

Yep. Its digital outputs are rated for 5 mA max.

There are newer and maybe better solutions, but on TAPR PPS projects
we've stuck with a design that Tom Clark came up with, paralleling
several (usually 3) 74AC04 inverters each with a 22 ohm resistor on
its output.  [ Originally Tom used 47 ohms thinking that would be
better for 50 ohm coax, but all the higher resistance does is lower
the voltage available. 22 ohms works well and gives more oomph at the
output. ]

The resistors may not do any one thing perfectly, but they provide
something resembling a source termination as well as equalize current
if the gates don't all trip at exactly the same time. Whatever the
theory, it seems to provide a fairly robust output that can drive coax
and deliver a useful output at the far end. As far as I've ever been
able to measure, the 74AC delay/jitter doesn't have any noticeable
detriment to the real world rise time.

As Bob said, this topic has been discussed a lot over the years and
it's really tough to reach an optimum solution because there are so
many different use cases.  The parallel AC04 gates have worked well
for us.

Thanks for the suggestion. My general use case requires very low noise
and high slew-rates. The line drivers shouldn't substantially
deteriorate the performance of an LTC6957 (320 ps typ. output rise
time). I've narrowed usable parts down to AD8000, TI BUF602, and TI
BUF608. For now I've picked the BUF602, because it's hand solderable.

Note that a potential issue with modern hardware is 3.3V GPS systems
trying to drive 5V logic inputs.  That doesn't give you a whole lot of
margin for termination loss.  Fortunately, everything I need to plug
in to these days seems to be happy with 3.3V levels.

I've made the same observation. The RF ICs that I need to deliver 10/100
MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V.

John


time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe send an email to time-nuts-leave@lists.febo.com

Best regards,
Carsten


time-nuts mailing list -- time-nuts@lists.febo.com
To unsubscribe send an email to time-nuts-leave@lists.febo.com

Hi Carsten, on my LEA-M8T breakout board I'm using two NC7SZ125 TinyLogic buffers in parallel. I think it should be good for around 1ns of rise time and with two 82 Ohm series resistors it's close enough to 50 Ohms output impedance. Schematics attached. BR, Matthias On Dienstag, 23. August 2022 21:37:02 CEST Carsten Andrich via time-nuts wrote: > Hi John, John, > > On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote: > > > > > > > On 8/22/22 15:59, John Sloan via time-nuts wrote: > > > > > > > >>> Have you had any issues with unmatched transmission line effects? > >> > >> > >> > >> Being an embedded software engineer in the telecom field, I’m > >> probably not qualified to answer that question. But I did cause the > >> board to reset when I tried putting 50 Ohm terminators on the TP1 and > >> TP2 SMA connectors. When I did this I checked the SparkFun schematic > >> and dimly recall that there is a resistor between each TP output pin > >> and the corresponding output pin (if you choose to solder on a > >> header) on the board, and that this connection is in parallel with > >> the SMA connector, which has no resistor at all. So I am inclined to > >> agree with you (despite my ignorance). > > > > > > > > I have had issues with various NEO-M8 and ZED-F9 boards when running > > the TP at a high (RF) rate, and driving more than a foot or two of > > coax into a digital, presumably high impedance, input. > > > > > > > > I think there are two related problems: > > > > > > > > 50 ohm coax driving a high impedance load is going to ring all over > > the place if given a chance. I found that putting an in-line 50 ohm > > terminator at the far end cleaned the waveform up very nicely. That's > > not unique to u-blox, it's just a fact of life. > > > > > > > > But with a terminator, the amplitude becomes marginal to trigger the > > logic at the far end. I suspect that's the u-blox not able to source > > enough current to get a solid logic transition through the terminator, > > and buffers should help. > > Yep. Its digital outputs are rated for 5 mA max. > > > > > > > There are newer and maybe better solutions, but on TAPR PPS projects > > we've stuck with a design that Tom Clark came up with, paralleling > > several (usually 3) 74AC04 inverters each with a 22 ohm resistor on > > its output. [ Originally Tom used 47 ohms thinking that would be > > better for 50 ohm coax, but all the higher resistance does is lower > > the voltage available. 22 ohms works well and gives more oomph at the > > output. ] > > > > > > > > The resistors may not do any one thing perfectly, but they provide > > something resembling a source termination as well as equalize current > > if the gates don't all trip at exactly the same time. Whatever the > > theory, it seems to provide a fairly robust output that can drive coax > > and deliver a useful output at the far end. As far as I've ever been > > able to measure, the 74AC delay/jitter doesn't have any noticeable > > detriment to the real world rise time. > > > > > > > > As Bob said, this topic has been discussed a lot over the years and > > it's really tough to reach an optimum solution because there are so > > many different use cases. The parallel AC04 gates have worked well > > for us. > > > Thanks for the suggestion. My general use case requires very low noise > and high slew-rates. The line drivers shouldn't substantially > deteriorate the performance of an LTC6957 (320 ps typ. output rise > time). I've narrowed usable parts down to AD8000, TI BUF602, and TI > BUF608. For now I've picked the BUF602, because it's hand solderable. > > > > > > > > Note that a potential issue with modern hardware is 3.3V GPS systems > > trying to drive 5V logic inputs. That doesn't give you a whole lot of > > margin for termination loss. Fortunately, everything I need to plug > > in to these days seems to be happy with 3.3V levels. > > I've made the same observation. The RF ICs that I need to deliver 10/100 > MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V. > > > > > > > John > > ---- > > _______________________________________________ > > time-nuts mailing list -- time-nuts@lists.febo.com > > To unsubscribe send an email to time-nuts-leave@lists.febo.com > > Best regards, > Carsten > _______________________________________________ > time-nuts mailing list -- time-nuts@lists.febo.com > To unsubscribe send an email to time-nuts-leave@lists.febo.com
G
ghf@hoffmann-hochfrequenz.de
Wed, Aug 24, 2022 8:26 AM

Am 2022-08-23 21:37, schrieb Carsten Andrich via time-nuts:

On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote:

The resistors may not do any one thing perfectly, but they provide
something resembling a source termination as well as equalize current
if the gates don't all trip at exactly the same time. Whatever the
theory, it seems to provide a fairly robust output that can drive coax
and deliver a useful output at the far end. As far as I've ever been
able to measure, the 74AC delay/jitter doesn't have any noticeable
detriment to the real world rise time.

As Bob said, this topic has been discussed a lot over the years and
it's really tough to reach an optimum solution because there are so
many different use cases.  The parallel AC04 gates have worked well
for us.

Thanks for the suggestion. My general use case requires very low noise
and high slew-rates. The line drivers shouldn't substantially
deteriorate the performance of an LTC6957 (320 ps typ. output rise
time). I've narrowed usable parts down to AD8000, TI BUF602, and TI
BUF608. For now I've picked the BUF602, because it's hand solderable.

Beware that the LTC6957 might be home of some gremlins, too.
The last picture was taken on an unused output, just 30 mm wrap wire
and 100K/0.6pF/2.4GHz probe. I don't believe that the other output
is unaffected by that, PN or jitter-wise. At least with some load
there is nothing to see on this scope.

Note that a potential issue with modern hardware is 3.3V GPS systems
trying to drive 5V logic inputs. 

There is no need for 5V logic inputs. Even in the 80s there was ACT and
TTL levels have nothing to do with 5V, other that it was the supply
voltage.
Even connecting unused inputs to 5V was considered bad style without a
current limiting resistor
for backwards biasing the open emitters.
Using 74AC for interfaces in a TTL world was simply wrong.
ACT is the very same process, just different w/l scaling for the input
FETs.

That doesn't give you a whole lot of margin for termination loss. 
Fortunately, everything I need to plug in to these days seems to be
happy with 3.3V levels.

I've made the same observation. The RF ICs that I need to deliver
10/100 MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V.

Single 74LVC gates (1G04, 1G125) behave as nearly ideal switches and
they
do not inherit ground bounce problems from other outputs. Some
manufacturers
spec Vcc abs max of 6.5 V, so Vcc = 6V should be OK if one is desperate.
Pics of the LVC driver use 50 Ohm scope input & 5.3 nsec of RG174-like
coax.

Gerhard

Am 2022-08-23 21:37, schrieb Carsten Andrich via time-nuts: > On 23.08.22 00:50, John Ackermann N8UR via time-nuts wrote: >> The resistors may not do any one thing perfectly, but they provide >> something resembling a source termination as well as equalize current >> if the gates don't all trip at exactly the same time. Whatever the >> theory, it seems to provide a fairly robust output that can drive coax >> and deliver a useful output at the far end. As far as I've ever been >> able to measure, the 74AC delay/jitter doesn't have any noticeable >> detriment to the real world rise time. >> >> As Bob said, this topic has been discussed a lot over the years and >> it's really tough to reach an optimum solution because there are so >> many different use cases.  The parallel AC04 gates have worked well >> for us. > > Thanks for the suggestion. My general use case requires very low noise > and high slew-rates. The line drivers shouldn't substantially > deteriorate the performance of an LTC6957 (320 ps typ. output rise > time). I've narrowed usable parts down to AD8000, TI BUF602, and TI > BUF608. For now I've picked the BUF602, because it's hand solderable. Beware that the LTC6957 might be home of some gremlins, too. The last picture was taken on an unused output, just 30 mm wrap wire and 100K/0.6pF/2.4GHz probe. I don't believe that the other output is unaffected by that, PN or jitter-wise. At least with some load there is nothing to see on this scope. >> Note that a potential issue with modern hardware is 3.3V GPS systems >> trying to drive 5V logic inputs.  There is no need for 5V logic inputs. Even in the 80s there was ACT and TTL levels have nothing to do with 5V, other that it was the supply voltage. Even connecting unused inputs to 5V was considered bad style without a current limiting resistor for backwards biasing the open emitters. Using 74AC for interfaces in a TTL world was simply wrong. ACT is the very same process, just different w/l scaling for the input FETs. >> That doesn't give you a whole lot of margin for termination loss.  >> Fortunately, everything I need to plug in to these days seems to be >> happy with 3.3V levels. > I've made the same observation. The RF ICs that I need to deliver > 10/100 MHz and pulse signals to are even fine with 3.3V / 2 = 1.65V. Single 74LVC gates (1G04, 1G125) behave as nearly ideal switches and they do not inherit ground bounce problems from other outputs. Some manufacturers spec Vcc abs max of 6.5 V, so Vcc = 6V should be OK if one is desperate. Pics of the LVC driver use 50 Ohm scope input & 5.3 nsec of RG174-like coax. Gerhard
JA
John Ackermann N8UR
Wed, Aug 24, 2022 4:46 PM

On 8/24/22 04:26, Gerhard Hoffmann via time-nuts wrote:

Beware that the LTC6957 might be home of some gremlins, too.
The last picture was taken on an unused output, just 30 mm wrap wire
and 100K/0.6pF/2.4GHz probe. I don't believe that the other output
is unaffected by that, PN or jitter-wise. At least with some load
there is nothing to see on this scope.

I recently used an LTC6957 as a sine-to-differential converter to drive
an SiLabs chip from a 50 MHz TCXO (following the schematic in the data
sheet).  FWIW, the phase noise at the output was no better (or worse)
than simply using a balun and center-tapped transformer for the
conversion.  Of course, it may just be that the TCXO's PN and/or
synthesizer limitations masked any improvement it might have made.

John

On 8/24/22 04:26, Gerhard Hoffmann via time-nuts wrote: > Beware that the LTC6957 might be home of some gremlins, too. > The last picture was taken on an unused output, just 30 mm wrap wire > and 100K/0.6pF/2.4GHz probe. I don't believe that the other output > is unaffected by that, PN or jitter-wise. At least with some load > there is nothing to see on this scope. I recently used an LTC6957 as a sine-to-differential converter to drive an SiLabs chip from a 50 MHz TCXO (following the schematic in the data sheet). FWIW, the phase noise at the output was no better (or worse) than simply using a balun and center-tapped transformer for the conversion. Of course, it may just be that the TCXO's PN and/or synthesizer limitations masked any improvement it might have made. John