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View all threadsOFDM Reciever chain on USRPx310
Hello everyone,
As part of a research project, I'm looking to implement an OFDM receiver
on the FPGA of a USRPx310 (and more specifically, the synchronisation
stage). According to my research, some RFNoC blocks with this function
already perform this function. Where can I find them?
If you are not aware of the existence of these blocks, I imagine the
best thing to do is to develop a new OOT module implementing this
functionality. Where can I find the documentation for creating a new
block (in UHD 4.8) ? In the RFNoC specifications? (I've already
installed UHD4.8, Vivado, ModelSim and run the Gain module's test-bench
successfully, created a new module with 'rfnoc_modtool', but I am a bit
lost about how to design my <block>.yml file, and then, wich signal to
drive in the SystemVerilog user logic code). I'm also wondering where I
can find the documentation for the available IPs to integrate in a new
design ?
Thanks for your help,
Quentin
Hi Quentin,
I don't know what OFDM blocks are available. But, regarding your questions
about getting started with RFNoC, you will want to use the RFNoC
Specification document along with reviewing the XML blocks that Ettus
developed for the various included blocks such as FFT, FIR, SplitStream,
etc. Also, reviewing exactly how the Gain block works is very helpful. You
mentioned that you ran the test bench for the example Gain block but
perhaps you could build this into an FPGA image and go through all of the
steps to make this run on the hardware while controlling it from software.
I would also search Ettus Knowledge base and past conference presentations
such as GRCon for information about creating your own RFNoC OOT block.
Rob
On Thu, Mar 6, 2025 at 9:20 AM Quentin Prieels <
quentin.prieels@student.uclouvain.be> wrote:
Hello everyone,
As part of a research project, I'm looking to implement an OFDM receiver
on the FPGA of a USRPx310 (and more specifically, the synchronisation
stage). According to my research, some RFNoC blocks with this function
already perform this function. Where can I find them?
If you are not aware of the existence of these blocks, I imagine the best
thing to do is to develop a new OOT module implementing this functionality.
Where can I find the documentation for creating a new block (in UHD 4.8) ?
In the RFNoC specifications? (I've already installed UHD4.8, Vivado,
ModelSim and run the Gain module's test-bench successfully, created a new
module with 'rfnoc_modtool', but I am a bit lost about how to design my
<block>.yml file, and then, wich signal to drive in the SystemVerilog user
logic code). I'm also wondering where I can find the documentation for the
available IPs to integrate in a new design ?
Thanks for your help,
Quentin
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On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
Hello Quentin,
On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
As part of a research project, I'm looking to implement an OFDM receiver on
the FPGA of a USRPx310 (and more specifically, the synchronisation stage).
According to my research, some RFNoC blocks with this function already
perform this function. Where can I find them?
AFAIR, there are some RFNoC blocks in a branch over the old FPGA repo:
https://github.com/EttusResearch/fpga/tree/rfnoc-ofdm
for example:
https://github.com/EttusResearch/fpga/blob/rfnoc-ofdm/usrp3/lib/rfnoc/ofdm_peak_detector.v
Apart from Schmidl&Cox, I don't see anything merged into the default branch.
Never used them. Don't know how accurate they are.
Note that they are 7-8 years old...
Best
Cédric Hannotier
Hello Cédric, Hello everyone
Thanks for your replies. I will try to use or be inspired by those blocks.
I have a slightly more specific question on this subject. Do you know
how to integrate the codes in the fpga/usrp3/lib/blocks/rnfoc folder
into a new OOT block/module? Do you instantiate them in the same way as
the ‘mult_rc’ IP (the one in the "HDL_IP" parameter) in the example of
the gain module? To structure the code, is it possible to define how to
move this code within the OOT block?
Thanks for your help, I appreciate.
Quentin
On 6/03/25 16:53, Cédric Hannotier wrote:
[Vous ne recevez pas souvent de courriers decedric.hannotier@ulb.be. Découvrez pourquoi ceci est important àhttps://aka.ms/LearnAboutSenderIdentification ]
On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
Hello Quentin,
On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
As part of a research project, I'm looking to implement an OFDM receiver on
the FPGA of a USRPx310 (and more specifically, the synchronisation stage).
According to my research, some RFNoC blocks with this function already
perform this function. Where can I find them?
AFAIR, there are some RFNoC blocks in a branch over the old FPGA repo:
https://github.com/EttusResearch/fpga/tree/rfnoc-ofdm
for example:
https://github.com/EttusResearch/fpga/blob/rfnoc-ofdm/usrp3/lib/rfnoc/ofdm_peak_detector.v
Apart from Schmidl&Cox, I don't see anything merged into the default branch.
Never used them. Don't know how accurate they are.
Note that they are 7-8 years old...
Best
Cédric Hannotier
On Thu, Mar 6, 2025 at 8:07 PM Quentin Prieels <
quentin.prieels@student.uclouvain.be> wrote:
Hello Cédric, Hello everyone
Thanks for your replies. I will try to use or be inspired by those
blocks.
I have a slightly more specific question on this subject. Do you know how
to integrate the codes in the fpga/usrp3/lib/blocks/rnfoc folder into a new
OOT block/module? Do you instantiate them in the same way as the ‘mult_rc’
IP (the one in the "HDL_IP" parameter) in the example of the gain module?
To structure the code, is it possible to define how to move this code
within the OOT block?
You can reference them in your custom Verilog simply by module name. In
your OOT module, make sure to reference them in the Makefile.srcs. You
might have to add an include line to your RFNoC block's Makefile.
--M
Thanks for your help, I appreciate.
Quentin
On 6/03/25 16:53, Cédric Hannotier wrote:
[Vous ne recevez pas souvent de courriers de cedric.hannotier@ulb.be. Découvrez pourquoi ceci est important à https://aka.ms/LearnAboutSenderIdentification ]
On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
Hello Quentin,
On 2025-03-06 15:19 +0100, Quentin Prieels wrote:
As part of a research project, I'm looking to implement an OFDM receiver on
the FPGA of a USRPx310 (and more specifically, the synchronisation stage).
According to my research, some RFNoC blocks with this function already
perform this function. Where can I find them?
AFAIR, there are some RFNoC blocks in a branch over the old FPGA repo:https://eur03.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FEttusResearch%2Ffpga%2Ftree%2Frfnoc-ofdm&data=05%7C02%7Cquentin.prieels%40student.uclouvain.be%7C3ae893fb4a284ca44e9f08dd5cc714ca%7C7ab090d4fa2e4ecfbc7c4127b4d582ec%7C1%7C0%7C638768732336272267%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=daAwbNquMCdD0qG2gSu73Zv9XjU8OF03P4YAY%2BncKVw%3D&reserved=0 https://github.com/EttusResearch/fpga/tree/rfnoc-ofdm
for example:https://eur03.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2FEttusResearch%2Ffpga%2Fblob%2Frfnoc-ofdm%2Fusrp3%2Flib%2Frfnoc%2Fofdm_peak_detector.v&data=05%7C02%7Cquentin.prieels%40student.uclouvain.be%7C3ae893fb4a284ca44e9f08dd5cc714ca%7C7ab090d4fa2e4ecfbc7c4127b4d582ec%7C1%7C0%7C638768732336299309%7CUnknown%7CTWFpbGZsb3d8eyJFbXB0eU1hcGkiOnRydWUsIlYiOiIwLjAuMDAwMCIsIlAiOiJXaW4zMiIsIkFOIjoiTWFpbCIsIldUIjoyfQ%3D%3D%7C0%7C%7C%7C&sdata=XnKpXNpmd9RTNmyF%2FFewBEL8MpL32bbe%2B1S1aUtyr%2Bo%3D&reserved=0 https://github.com/EttusResearch/fpga/blob/rfnoc-ofdm/usrp3/lib/rfnoc/ofdm_peak_detector.v
Apart from Schmidl&Cox, I don't see anything merged into the default branch.
Never used them. Don't know how accurate they are.
Note that they are 7-8 years old...
Best
Cédric Hannotier
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