It involves computing the MEDIAN over a number measurements (say 60) to get a reliable estimate of the measurement's MEAN value in that time. Note that the normal MEAN computation is susceptible to outliers while the MEDIAN is not.

The manual simply refers to those as "Estimate of UTC/GPS offset", but does not give any detail of how they are computed or what they mean. The Thunderbolt User's Manual says that the 1 PPS output is the OCXO's 10 MHz divided down. Yet, the block diagram shows the 1 PPS coming from the CPU and support circuit, not directly coming from the 10 MHz.

Put the seal-screw back in, and follow the manual's procedure to restart the estimator. Let the thing sit about an hour or so. Assuming everything else is OK, you should end up with 'Time Locked' and 'TFOM = 4' in the display, and no 'FLT' indications.

Large temperature swings are routine, so we should be able to estimate the potential effect of a common ground in the EFC return as temperature changes and see how significant it is compared to the natural OCXO temperature sensitivity.

This is only promoted by those unaware of that the theoretical problems associated with estimating the noise characteristics of a limiter have long since been resolved. When using a set of cascaded filter limiters it should be possible to use -5V and +5V rails, leading to reduced power dissipation and drift.

Mike Its well worthwhile estimating the additional jitter due to this effect when using such a circuit to square up the output of an OCXO: If the input signal characteristics are: Frequency 10MHz Amplitude at the gate input: A = 1.4V pk Threshold mismatch Vt = 1V AM noise: Am = -120dBc/Hz Input signal AM noise bandwidth

If you plot the satellite count and DAC voltage (and along with the PPS error estimate) you will see that the DAC voltage changes with every satellite constellation change. This causes the oscillator to change frequency.

Hello Bob, My 15mA estimate for the output stage was based on AC coupling the output, which is how I connected it. The IC is then sourcing 25mA into 100R for half the time and sinking 25mA the rest of the time, so the mean supply current drawn is 12.5mA. The extra is to allow for the IC's dissipation capacitance x 5V x 10MHz.

Much better estimation and planning, so less "surplus" (in the sense of buy 20% more to account for scrap and so forth, and actually wind up with 10% left over at the end of the production run) 6) Ebay and UPS. I think that's more the death of things like ham-fests as supplies of equipment.

However the extra phase noise filtering due to the finite PLL bandwidth (including any EFC filtering built in to the reference oscillator) allows an estimate of the maximum sampling rate likely to be required to ensure that such phase noise whitening effects are acceptably small.