yeah I certainly dont buy the 3 days at 105C based on my own
research....  These are AT , by the way, FWIW.

Rick your point about not observing aging different for a 105C versus an
80C xtal is telling. Today, it is hard to get xtal mfrs interested in
the fussy crystals I want and only perhaps 100-200 per annum.  I am
beginning to think I need to make a large automated test jig, or go
about this a different way. Having a high PLL reference PD frequency is
essential - 49MHz  or pref 98 MHz .

These dont have to be super stable over temperature-  since I disclipine
that oscillator to an off-the-shelf cheap arse 10 MHz chip TCXO  that
costs $5  (1ppm is plenty ! ) .

*** Tweaking temperature to tweak frequency might just be useful. Of
course, I am going to have to think about this, as the low end will be
where the equipment temp can get to...

Looking at the temperature frequency curves for different angles cuts
for 3OT crystals, for example, and my understanding of this stuff is
rudimentary compared to a crystal expert :  A 0 second cut yields a 23
ppm from 25 deg C to 87 deg C. at 70 deg C, in this graph this is +8ppm,
IE the crystal might need to be cal-ed for 8ppm low.

DO you feel this might be an avenue to persue ? I certainly need to get
some characteristic data first into my spreadsheets before I go off on this.

-glen

On 9/12/2023 3:03 pm, Richard (Rick) Karlquist wrote:

Hi

Having designed / built / shipped a few (million) OCXO’s over the years ….

1. Every one of them got an aging test. There never was an assumption made based on this or that crystal process. Some percentage always got rejected. Yes, this bothered the accountants quite a bit :) :). If there had been a way to go with some sort of 3 day “crystal check”, the savings would have been in the millions of dollars.

2. Crystal aging and its modeling is a “fun” field to dig into. There are a lot of things that can make it difficult. The equations you see in various papers are useful. Often the data they use to demonstrate the fit is from runs that are not quite in the “typical” range …. errr ….  One typical gotcha is fitting an initial “retrace” sort of curve (which damps out in hours / days) and calling that aging. Another gotcha is that the worse the crystal, the better it will fit this or that curve ( = there is one dominant effect driving things).

3. Ferrite core inductors can (and sometimes do) dominate the aging, even of a VHF design. More than any other part, coils pop up as “hard to manage” items. The first OCXO I ever worked on was a redesign to eliminate a ferrite part.

4. Back in the day (1930’s maybe ….) the theory was that aging doubled every time you bumped the temperature by 10C. Obviously this would make an OCXO at 90C horrible compared to one at 0C. Folks did to the experiment in the 1950’s (and possibly before that). They saw no advantage aging wise and a lot of issues thermal design wise. Yes, this was done with OCXO crystals.

5. The packaging and processing for an OCXO crystal is very different than what is done for something targeted at a room temperature MCU sort of application. There is a reason you pay more for an OCXO crystal.

6. Some level of burn in is a good idea for any OCXO. This includes ones that simply have been on the shelf for a couple years. It is not at all uncommon to just put a part on power for a couple of weeks before you test or use it.

Aging wise, what to do:

One option is to set up something like HP used. Very fancy, very nicely done, lots and lots of data collected. One would guess pretty darn expensive to implement.

The opposite extreme is to just put them on a shelf and wheel up a frequency counter every so often. Is that once a day 5 days a week? Maybe. Take a month (or two) of data and look at it. Folks did aging checks this way “back then”. It’s not ideal, but it is way better than nothing at all.

Fun !!!!

Bob

Great summary Bob.

Just wanted to amplify your point about the "dominant effect" syndrome.
When I was young and foolish 50 years ago, I believed the folklore
about Colorado Crystals "magic" glass enclosures:  unlike "dirty" metal
enclosures, the glass ones were ultra clean, which was "proven"
by the fact that they always drifted up in frequency, whereas
metal ones drifted downward.  Later, when I joined HP and met Jack
Kusters, he told me about the dominant effect syndrome.  His
philosophy is that if aging is not random, you have a dominant process.
He told me that he had eliminated as much as possible any such
processes.  Specifically, his copper enclosures were fabricated in
such a way as to eliminate outgassing of copper or whatever from the
can to the quartz that would bias the aging in the downward direction.

Rick N6RK

On 12/9/2023 6:40 AM, Bob kb8tq via time-nuts wrote:

thanks Rick, Bob

which said aging going both directions..... If i can going to drive
temperature  on the crystal to deal with this IE board temperature will
be between 30deg C and 60 deg C, then I am going to have a tough time
dealing with this  . IE having the crystal live between 60 deg C and say
100 deg C.

 But  aging direction is not absolutely known.  The  angle of the cut
etc needs to be chosen to cover all the bases, and this just might not
be possible.

groan.  Remember, this doesnt have to be super stable- it will be pulled
against a 10 MHz TCXO or GPS in the system.

Look at (one of ) the charts, something that has a turning point (TP) of
70 deg C would be - 15ppm at 70C and + 15 ppm at 110 C ... or if _/- 10
ppm is enough, -10ppm at 60 C and +10ppm at 100C.

etc.

On 12/12/2023 1:18 am, Richard (Rick) Karlquist wrote:

 
I'll bet the accelerated aging was more about the other components than the crystal.  
We do similar tests for space flight applications - blast it with some number of kRad TID, perhaps irradiate it in an accelerator to get heavy ions.  - but that would normally be a "test unit" - that is, why consume "life" on the actual unit. 
But they all get the accelerated aging at high temp, with an assumption of Arrhenius coeffcients. 

There's also an annealing process with radiation damage, so zap it and heat it will sometimes reduce the effect of the does (particularly displacement damage, get it hot and the displaced thing goes back from whence it came).  Of course, these days, with highly doped and tiny, tiny features, that high temperature might actually "un-do" the careful doping. 

On Fri, 8 Dec 2023 17:19:26 -0600, Ben Hall via time-nuts time-nuts@lists.febo.com wrote:

On 12/7/2023 3:38 PM, Bob kb8tq via time-nuts wrote:

Many moons ago I worked at a test lab that did nuclear plant Loss of Coolant Accident (LOCA) certification testing. Prior to the LOCA tests, we had to send the test items out to be irradiated in a hot (radiation) cell, then cooked them in our lab temp chambers at X degrees for Y days that simulated Z years of nuke plant use at ambient temp T per an IEEE document whose number I forget.

Fun stuff. ;)

Wish I could remember the document. I'd trust IEEE to do the temp/time calculations correctly, so I wonder how the Krystaly numbers would compare?

thanks much,
ben

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Hi

When you change the oven temperature you get both first and second order temperature effects. You also impact the degree aging has “settled out”.

The turning point on your crystal is going to be a “that depends” sort of thing. A 20C range is not unusual, even on a crystal built to put in an OCXO.

One question that has not been asked: Are these in cold weld or resistance weld packages? If these are resistance weld then the aging stuff about cold weld parts simply does not apply ….

Bob

Well today Bob, I find hysteresis, retrace, and spurious modes all
affected by pulling the temperature all over the place ( as an attempt
to get another handle of control) .  Ands different starting behaviour
at temperature spots. golly.

Propensity of spurious modes (my 3OT xtals) seems to be dependent on
temperature, also. golly.

This is tough. Might just have  tweak  in there that gets adjusted every
few years.

Holding it over a narrow temperature range (without the intention of
stability) appears to improve behaviour of hysteresis, retrace and
spurious modes, at least over a few hours.

IE by holding it in a in a small temperature range, I reduce the number
of things that can affect the outcome.

Time to go back and read some more Rubiola.

Bob, I built your low noise oscillator for a fundamental AT xtal.
Reduced bad behaviour, but more noise than the overtone crystal.

Geeez who would build crystal oscillators for a living ????

glen

On 12/12/2023 11:00 am, Bob kb8tq wrote:

 
I can't remember where this thread started, but do you actually need to move the oscillator at all? Or is "knowledge" good enough?
For instance, could you have a (high quality) DDS to generate a desired frequency, and the commanding of the DDS is done by comparing your oscillator and the 1pps from external reference.

This may or may not work, depending on your phase noise requirements.  There are techniques for DDSes to make the close in phase noise small (at the expense of raising it farther out - it's always like squishing a balloon).

Or some other technique of taking a quiet, but movable, oscillator and locking it to your "good" oscillator (and using GPS to set the relative frequencies).

On Tue, 12 Dec 2023 17:20:21 +1100, glen english LIST via time-nuts time-nuts@lists.febo.com wrote:

Well today Bob, I find hysteresis, retrace, and spurious modes all
affected by pulling the temperature all over the place ( as an attempt
to get another handle of control) .  Ands different starting behaviour
at temperature spots. golly.

Propensity of spurious modes (my 3OT xtals) seems to be dependent on
temperature, also. golly.

This is tough. Might just have  tweak  in there that gets adjusted every
few years.

Holding it over a narrow temperature range (without the intention of
stability) appears to improve behaviour of hysteresis, retrace and
spurious modes, at least over a few hours.

IE by holding it in a in a small temperature range, I reduce the number
of things that can affect the outcome.

Time to go back and read some more Rubiola.

Bob, I built your low noise oscillator for a fundamental AT xtal.
Reduced bad behaviour, but more noise than the overtone crystal.

Geeez who would build crystal oscillators for a living ????

glen

On 12/12/2023 11:00 am, Bob kb8tq wrote:

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Hi Jim

a recap : The thread started with the aging issue and having enough pull
to deal with 10-15 years of aging.

DDS : that is a good point, and I have done frequency references doing
just that- That is to say ,  to hell with the source frequency, just
adjust the DDS to give you the frequency that you need.  I did this for
some ham stuff-

The DDS should be able to meet the requirements- but it would need to be
clocked alot faster to get the output I want. And of course I have to
make that higher clock --- (cannot use internal DDS multiplying PLLs -
they are quite noisy).  which sort of adds an extra layer of complexity.
and the fast  big DDSs are expensive (comparitivly) .

 .....yeah could lock my 98.304 oscillator  a lower oscillator , but  I
will do that anyway, my issue is the aging . I also need to reduce the
number of oscillators on the board because their fundamental (and
harmonics) will be heard by the ADC that is looking at FSD - 120dB ! so 
one reason to go such a high reference is to reduce birdie opportunities...
But, your suggestion I will take a 2nd think about.

The aging is the unknown killer (and the DDS would sort that - admit)
although I'd need to look at if the frequency step was available (IE DDS
resolution)  to keep a number of them within 0.1ppm of each other.

the sample clocks produced by the rather good synthesisers (believe it
or not) are around 392 MHz. (98 x 4).

The ADF4356 is a bl00dy ripper of a device.  It is VERY impressive but,
$$ and power power. There is also the LMX2572LP I use  which is $ and
low power, but almost as good at a quarter of the price. and power.

I use both in my designs..

On 13/12/2023 6:02 am, Jim Lux via time-nuts wrote: